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| March 1996 NDS352P P-Channel Logic Level Enhancement Mode Field Effect Transistor General Description These P-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as notebook computer power management, portable electronics, and other battery powered circuits where fast high-side switching, and low in-line power loss are needed in a very small outline surface mount package. Features -0.85A, -20V. RDS(ON) = 0.5 @ VGS = -4.5V. Proprietary package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. Compact industry standard SOT-23 surface mount package. ____________________________________________________________________________________________ D G S Absolute Maximum Ratings Symbol VDSS VGSS ID PD TJ,TSTG Parameter Drain-Source Voltage T A = 25C unless otherwise noted NDS352P -20 12 (Note 1a) Units V V A Gate-Source Voltage - Continuous Maximum Drain Current - Continuous - Pulsed Maximum Power Dissipation (Note 1a) (Note 1b) 0.85 10 0.5 0.46 -55 to 150 W Operating and Storage Temperature Range C THERMAL CHARACTERISTICS RJA RJC Thermal Resistance, Junction-to-Ambient (Note 1a) 250 (Note 1) C/W C/W Thermal Resistance, Junction-to-Case 75 (c) 1997 Fairchild Semiconductor Corporation NDS352P Rev. F1 Electrical Characteristics (TA = 25C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS IDSS IGSSF IGSSR VGS(th) RDS(ON) Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VGS = 0 V, ID = -250 A VDS = -16 V, VGS = 0 V TJ =125C Gate - Body Leakage, Forward Gate - Body Leakage, Reverse VGS = 12 V, VDS = 0 V VGS = -12 V, VDS = 0 V VDS = VGS, ID = -250 A TJ =125C Static Drain-Source On-Resistance VGS = -4.5 V, ID = -0.85 A TJ =125C VGS = -10 V, ID = -1 A ID(ON) gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd On-State Drain Current Forward Transconductance VGS = -4.5 V, VDS = -5 V VDS = -5 V, ID = -0.85 A VDS = -10 V, VGS = 0 V, f = 1.0 MHz -2 1.5 -0.8 -0.5 -1.6 -1.3 0.46 0.59 -20 -5 -20 100 -100 V A A nA nA ON CHARACTERISTICS (Note 2) Gate Threshold Voltage -2.5 -2.2 0.5 0.7 0.35 A S V DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance 125 140 45 pF pF pF SWITCHING CHARACTERISTICS (Note 2) Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = -10 V, ID = -0.85 A, VGS = -5 V VDD = -10 V, ID = -1 A, VGS = -10 V, RGEN = 50 8 19 64 61 2.2 15 30 90 90 4 1 2 ns ns ns ns nC nC nC NDS352P Rev. F1 Electrical Characteristics (TA = 25C unless otherwise noted) Symbol Parameter Conditions Min Typ Max Units DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS ISM VSD Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = -0.85 A (Note 2) -0.92 -0.6 -5 -1.2 A A V PD (t) = R J A (t) T J -TA = R J C CA +R (t) T J -TA = I 2 (t) x RDS(ON ) D TJ Typical RJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 250oC/W when mounted on a 0.02 in2 pad of 2oz cpper. b. 270oC/W when mounted on a 0.001 in2 pad of 2oz cpper. 1a 1b Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%. NDS352P Rev. F1 Typical Electrical Characteristics -5 I D , DRAIN-SOURCE CURRENT (A) 1.8 V GS = -10V -7.0 R DS(on), NORMALIZED DRAIN-SOURCE ON-RESISTANCE -5.5 -5.0 -4.5 -4 1.6 V GS = -3.5 V -4.0 -4.5 1.4 -3 -4.0 1.2 -5.0 -5.5 -7.0 -10 -2 -3.5 1 -1 -3.0 0.8 0 0.6 0 -1 -2 -3 -4 0 -1 V DS , DRAIN-SOURCE VOLTAGE (V) -2 -3 I D , DRAIN CURRENT (A) -4 -5 Figure 1. On-Region Characteristics Figure 2. On-Resistance Variation with Drain Current and Gate Voltage 1.4 DRAIN-SOURCE ON-RESISTANCE (OHMS) 2 R DS(on), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.3 1.2 1.1 1 0.9 0.8 0.7 -50 I D = -0.85A V GS = -4.5V 1.8 1.6 1.4 V GS = -4.5V R DS(ON), NORMALIZED TJ = 125C 25C 1.2 -55C 1 0.8 0.6 -25 0 25 50 75 100 125 150 0 -1 T , JUNCTION TEMPERATURE (C) J -2 I D , DRAIN CURRENT (A) -3 -4 Figure 3. On-Resistance Variation with Temperature Figure 4. On-Resistance Variation with Drain Current and Temperature V DS = -10V -4 T J = -55C Vth , NORMALIZED GATE-SOURCE THRESHOLD VOLTAGE (V) -5 1.15 1.1 25 125 V DS = VGS I D = -250A ID , DRAIN CURRENT (A) 1.05 1 0.95 0.9 0.85 0.8 -50 -3 -2 -1 0 -1 -2 V GS -3 -4 -5 , GATE TO SOURCE VOLTAGE (V) -6 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C) 125 150 Figure 5. Transfer Characteristics Figure 6. Gate Threshold Variation with Temperature NDS352P Rev. F1 Typical Electrical Characteristics (continued) DRAIN-SOURCE BREAKDOWN VOLTAGE (V) 1.15 5 ID = -250A 1.1 -I S , REVERSE DRAIN CURRENT (A) VGS = 0V 1 0.5 BV DSS , NORMALIZED T J = 125C 25C -55C 1.05 0.1 1 0.01 0.95 0.9 -50 -25 0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C) 125 150 0 0.4 0.8 1.2 1.6 2 2.4 -VSD , BODY DIODE FORWARD VOLTAGE (V) Figure 7. Breakdown Voltage Variation with Temperature Figure 8. Body Diode Forward Voltage Variation with Source Current and Temperature 500 -10 , GATE-SOURCE VOLTAGE (V) 300 200 CAPACITANCE (pF) I D = -850m A -8 V DS = -5V -10 -6 Ciss 100 Coss 50 -4 f = 1 MHz 30 20 0.1 V 0 V GS = 0 V Crss 0.5 1 2 5 10 20 0.2 -V DS GS -2 0 1 2 Q g , GATE CHARGE (nC) 3 4 , DRAIN TO SOURCE VOLTAGE (V) Figure 9. Capacitance Characteristics Figure 10. Gate Charge Characteristics VDD t d(on) ton t off tr 90% t d(off) 90% VIN D RL V OUT VOUT 10% tf VGS R GEN 10% 90% G DUT S V IN 10% 50% 50% PULSE WIDTH INVERTED Figure 11. Switching Test Circuit Figure 12. Switching Waveforms NDS352P Rev. F1 Typical Electrical Characteristics (continued) g FS, TRANSCONDUCTANCE (SIEMENS) 3 20 V DS = -5V 2.5 2 TJ = -55C -I D , DRAIN CURRENT (A) 10 5 2 1 0.5 RD S(O LI N) T MI 10 1m 10 10 0m 0u s 25C 125C 1.5 1 0.5 0 s ms 0.1 0.05 V GS = -10V SINGLE PULSE T A = 25C 1s 10 s DC s 0 -1 -2 -3 ID , DRAIN CURRENT (A) -4 -5 0.01 0.1 0.2 0.5 -V DS 1 2 5 10 20 30 , DRAIN-SOURCE VOLTAGE (V) Figure 13. Transconductance Variation with Drain Current and Temperature Figure 14. Maximum Safe Operating Area 1 0.5 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE D = 0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 0.0001 0.2 0.1 0.05 0.02 0.01 P(pk) R JA (t) = r(t) * RJA R = 250 C/W JA t1 Single Pulse t2 TJ - T A = P * R JA (t) Duty Cycle, D = t1 /t2 0.001 0.01 0.1 t1 , TIME (sec) 1 10 100 300 Figure 15. Transient Thermal Response Curve Note : Characterization performed using the conditions described in note 1c. Transient thermal response will change depending on the circuit board design. NDS352P Rev. F1 |
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